|Article title||METHODS FOR INCREASING ACCURACY OF PEAK CURRENT ESTIMATION AT THE LOGICAL LEVEL BASED ON LOGIC CORRELATION ANALYSIS|
|Authors||S.V. Gavrilov, D.I. Ryzhova, A.L. Stempkovskiy|
|Section||SECTION II. AUTOMATION OF DESIGNING|
|Month, Year||07, 2014 @en|
|Abstract||With scaling problems for which decision analysis of peak current in the supply buses is required, are increasing - voltage drop in the supply buses (IR-drop), the choice of the supply buses width. There are two types of approaches for peak current estimation. Methods of test pattern analysis give lower and more accurate estimate. On the other hand, the methods for summing the maximum current for each circuit block allow obtaining an upper bound. However methods of first type do not provide reliability and completeness of test coverage to design circuits with a large number of external inputs, and specialized methods focused on the search of upper bound do not take into account parameter variations and operating logic of the circuit. This paper describes the method based on logic correlation analysis, which provides a significant increase accuracy of peak current estimation taking into account simultaneous switching of several inputs is proposed.|
|Keywords||Static timing analysis; intellective property block; logic correlations; analysis of peak current.|
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