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Article title SPEEDUP AND EFFICIENCY ESTIMATION OF PARALLEL SSOR ALGORITHM
Authors A.E. Chistyakov
Section SECTION VI. PARALLEL ALGORITHMS
Month, Year 06, 2010 @en
Index UDC 551.466
DOI
Abstract Parallel realization of analog SSOR has been presented at the paper. Speed-up and efficiency estimation for 1D and 2D domain decomposition techniques has been presented. The relation between speed-up and involved processors is given.

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Keywords Parallel realization; SSOR; Estimates for speedup.
References 1. Самарский А.А. Теория разностных схем. – М.: Наука, 1989.
2. Коновалов А.Н. К теории попеременно-треугольного итерационного метода // Сибирский математический журнал. – 2002. – № 43 (3). – С. 552-572.

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