Article

Article title PARTITIONING ON THE BASIS OF MULTILEVEL ADAPTATION
Authors B.K. Lebedev, О.B. Lebedev
Section SECTION II. AUTOMATION OF DESIGNING
Month, Year 09, 2008 @en
Index UDC 658.512
DOI
Abstract In work the problem of partitioning is represented as adaptive system, on the basis of a combination evolutionary, multilevel, and parallel approaches to search of the decision. The new approach, algorithms and techniques of management are described by process of evolutionary search of the decision on the basis of mechanisms of collective alternative adaptation.

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Keywords partitioning, adaptive system, evolutionary, multilevel, search of the decision.
References 1. Naveed Sherwani. Algorithms for VLSI Physical Design Automation. Kluwer academic publishers. Boston /Dordrecht/ London. 1995.
2. M. Sarrafzadeh and C. K. Wong. An Introduction to VLSI Physical Design. New York: McGraw Hill. 1996.
3. Деньдобренко Б.П., Малика А.С. Автоматизация проектирования радиоэлектронной аппаратуры. М., Высш. шк., 2002
4. J. Cong, C. Wu, ‘Global Clustering-Based Performance-Driven Circuit Partitioning’, Proc. ISPD, 2002.
5. G. Karypis. Multilevel hypergraph partitioning. In J. Cong and J. Shinnerl, editors, Multilevel Optimization Methods for VLSI, chapter 6. Kluwer Academic Publishers, Boston, MA, 2002.
6. Yongseok Cheon, Seokjin Lee, Martin D. F. Wong, “Stable Multiway Circuit Partitioning for ECO”, 2003
7. Navaratnasothie Selvakkumaran and George Karypis, “Multi-Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization”, ICCAD 2003.
8. Курейчик В.М., Курейчик В.В. Генетический алгоритм разбиения графа // Известия Академии наук. Теория и системы управления, №4, 1999.
9. C. Alpert and A. Kahng. A hybrid multilevel/genetic approach for circuit partitioning. In Proceedings of the Fifth ACM/SIGDA Physical Design Workshop, pages 100–105, 2002.
10. Курейчик В.М., Лебедев Б.К., Лебедев О.Б. Поисковая адаптация: теория и практика. − М.: Физматлит, 2006.
11. Мazumder P., Rudnick E. Genetic Algorithm For VLSI Design, Layout & Test Automation. India, Pearson Education, 2003.

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