Authors Yu.I. Doronchenko, A.G. Kovalenko
Month, Year 11, 2016 @en
Index UDC 004.315
DOI 10.18522/2311-3103-2016-11-413
Abstract The paper covers a methodology of implementation of large computational nodes as library VHDL-units for reconfigurable computer systems. A library of circuit elements for Xilinx UltraScale FPGAs is presented. The library was developed in Scientific Research Centre of Supercomputers and Neurocomputers (Taganrog, Russia). All elements were implemented in the VHDL language. Owing to this they can be used not only for the abovementioned FPGA family but for FPGAs of various vendors and families. The maximal capabilities of the library are given to developers who create applications in the high-level language COLAMO, because use of any element from the library is automatic and depends on the program code. The library of circuit elements is divided into groups according to functions (communication, floating point operations, integer operations, logical operations, data storage, etc.), capacity (variable capacity, 32-digit capacity, 64-digit capacity, other capacities) and presence/absence of triggers in output buses of elements. The total number of groups is 20. The library contains VHDL-descriptions of more than 300 circuit elements. The clock rate of the elements is from 450 to 550 MHz for UltraScale FPGAs. The current structure of circuit elements description is adapted for their use in the development environment using the language COLAMO. VHDL-description of the library elements contains a specialized structure of commentaries for a synthesizer Fire!Constructor, which is a tool of the application development software suit. The methodology, which allows creating a library of large nodes of computational problems for RCS, is described. The developed library of circuit elements can be useful for experienced developers for reduction of the projects development time, and for entry-level circuit engineers and applications developers. It will help them to achieve rather high performance of their solutions without multiple optimizations of code and detailed analysis of FPGA structure, which can be modified, improved and added by the developer depending on the problem domain of soling tasks. Owing to the suggested methodology of implementation of large computational nodes as library VHDL-units it is possible to reduce the implementation time of computationally laborious problems on RCS up to 30 %.

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Keywords Reconfigurable computer structure; FPGA programming; VHDL; programming language COLAMO; library of circuit elements.
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