Article

Article title PROCEDURE OF INTER-ITERATION REDUCTION OF DELAYS FOR PIPELINE RECURSIVE CALCULATIONS
Authors Y.I. Doronchenko
Section SECTION VI. HARDWARE-SOFTWARE TOOLS OF SAFETY
Month, Year 04, 2012 @en
Index UDC 004.272.22
DOI
Abstract The paper covers the method of reduction of hardware resource needed for pipeline recursive calculations in computationally laborious algorithms of information security. For the first time the author has shown effectiveness of application of the suggested method in reconfigurable computer systems. The developed procedure of inter-iteration reduction provides minimal recursive constraints for time distributed calculations and reduction of synchronization costs from 1.3 up to 6 times. Besides, it helps to increase specific performance of pipeline recursive calculations for reconfigurable computer system.

Download PDF

Keywords Pipeline calculations; information security; recursive calculations; reduction; synchronization.
References 1. Каляев А.В., Левин И.И. Модульно-наращиваемые многопроцессорные системы со структурно-процедурной организацией вычислений. – М.: ООО «Изд-во Янус-К», 2003. – 380 с

Comments are closed.