|Article title||SOFTWARE AND HARDWARE DEVELOPMENT AND RESEARCH OF ENCRYPTION ALGORITHM PRESENT FOR SOLVING PROBLEMS OF THE LIGHTWEIGHT CRYPTOGRAPHY|
|Authors||L.K. Babenko, D.A. Bespalov, O.B. Makarevich, R.D. Chesnokov, Y.A. Trubnikov|
|Section||SECTION IV. METHODS AND MEANS OF CRYPTOGRAPHY AND STEGANOGRAPHY|
|Month, Year||02, 2014 @en|
|Index UDC||004.056 .55|
|Abstract||This article presents the results of the block cipher PRESENT overview, as well as some practical results for software solutions and hardware modules, configured as a single FPGA device. The analysis of developed solution showed that maximum frequency of this algorithm implementation depends on maximum frequency of FPGA IC, uses 297 logical elements and 0 memory blocks. Hardware description of algorithm was implemented in Altera Cyclone II EP2C20F484C7 with 27, 50 and 100 MHz duty frequencies. In addition to hardware description of PRESENT, software implementation was developed and adapted for .NET Micro Framework technology. This software implementation can be used in 32- and 64-bit microprocessors and microcontrollers such as ARM7, ARM9 and Blackfin. As the result of this work, we have developed hardware and software definition of the PRESENT cipher and got synthesizable implementations, which meet requirements of lightweight cryptography and can be effectively used in different software and hardware applications such as RFID systems. Moreover, describes the hardware implementation of the subtleties of the project configuration, S-block, and also provides the numerical characteristics of the developed coprocessor core.|
|Keywords||Cipher; present; lightweight cryptography; internet of things; system on chip (FAPGA).|
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